The paper presents a new model of the dynamic power dissipated by a circuit described at gate or behavioural level. A procedure is presented for an accurate estimate of the power dissipated during the execution of each instruction by using gate level or behavioural level digital simulations. The information on power consumption stored in a look-up table can be used in a system level simulation. The methodology has been applied to the design of an I2C bus driver.
Instruction based power consumption estimation methodology / Caldari, M; Conti, Massimo; Crippa, Paolo; Nuzzo, G; Orcioni, Simone; Turchetti, Claudio. - 2:(2002), pp. 721-724. (Intervento presentato al convegno 9th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2002) tenutosi a Dubrovnik, Croazia nel 15 - 18 Settembre 2002) [10.1109/ICECS.2002.1046270].
Instruction based power consumption estimation methodology
CONTI, MASSIMO;CRIPPA, Paolo;ORCIONI, Simone;TURCHETTI, Claudio
2002-01-01
Abstract
The paper presents a new model of the dynamic power dissipated by a circuit described at gate or behavioural level. A procedure is presented for an accurate estimate of the power dissipated during the execution of each instruction by using gate level or behavioural level digital simulations. The information on power consumption stored in a look-up table can be used in a system level simulation. The methodology has been applied to the design of an I2C bus driver.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
