A novel statistical model for MOS transistor drain current has been developed that allows to explore IC's architectures and study the technological variations effects on the system performance without using time-consuming Monte Carlo simulations. Characterizing this model only requires a cheap and easy estimation of mean value and autocorrelation function of a single stochastic process describing all the process/device variations.
A statistical MOS model for CAD of submicrometer analog IC's
CRIPPA, Paolo;TURCHETTI, Claudio;CONTI, MASSIMO
2001-01-01
Abstract
A novel statistical model for MOS transistor drain current has been developed that allows to explore IC's architectures and study the technological variations effects on the system performance without using time-consuming Monte Carlo simulations. Characterizing this model only requires a cheap and easy estimation of mean value and autocorrelation function of a single stochastic process describing all the process/device variations.File in questo prodotto:
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