A novel statistical model for MOS transistor drain current has been developed that allows to explore IC's architectures and study the technological variations effects on the system performance without using time-consuming Monte Carlo simulations. Characterizing this model only requires a cheap and easy estimation of mean value and autocorrelation function of a single stochastic process describing all the process/device variations.

A statistical MOS model for CAD of submicrometer analog IC's / Crippa, Paolo; Turchetti, Claudio; Conti, Massimo. - 2:(2001), pp. 901-904. (Intervento presentato al convegno 44th IEEE 2001 Midwest Symposium on Circuits and Systems (MWSCAS 2001) tenutosi a Dayton, OH, U.S.A. nel 14 - 17 Agosto 2001) [10.1109/MWSCAS.2001.986333].

A statistical MOS model for CAD of submicrometer analog IC's

CRIPPA, Paolo;TURCHETTI, Claudio;CONTI, MASSIMO
2001-01-01

Abstract

A novel statistical model for MOS transistor drain current has been developed that allows to explore IC's architectures and study the technological variations effects on the system performance without using time-consuming Monte Carlo simulations. Characterizing this model only requires a cheap and easy estimation of mean value and autocorrelation function of a single stochastic process describing all the process/device variations.
2001
9780780371507
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11566/47079
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