In this work a new test structure for mismatch characterization of CMOS technologies is presented. The test structure is modular, with a reduced area and it can be inserted in the space between the dies (scribe lines) on the wafers. The test structure has been implemented in a standard 0.18-μm digital CMOS technology.
A modular test structure for CMOS mismatch characterization / Conti, M., Crippa, P., Fedecostante, F., Orcioni, S., Ricciardi, F., Turchetti, C., Vendrame, L.. - 5:(2003), pp. 569-572. (2003 International Symposium on Circuits and Systems (ISCAS '03) Bangkok, Tailandia 25 - 28 Maggio 2003) [10.1109/ISCAS.2003.1206376].
A modular test structure for CMOS mismatch characterization
CONTI, MASSIMO;CRIPPA, Paolo;ORCIONI, Simone;TURCHETTI, Claudio;
2003-01-01
Abstract
In this work a new test structure for mismatch characterization of CMOS technologies is presented. The test structure is modular, with a reduced area and it can be inserted in the space between the dies (scribe lines) on the wafers. The test structure has been implemented in a standard 0.18-μm digital CMOS technology.File in questo prodotto:
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