Communication architecture is crucial for performances and power constraints in modern multicore systems on chip (SoC). Network-on-Chip (NoC) is used to increase the bandwidth limitations of a traditional bus paradigm. In this work an interface between the AMBA-AHB bus and NoC has been designed. A NoC simulation environment has been modified integrating the AHB architectures in different NoC architectures. The performances of different heterogeneous (AHB-NoC) architectures have been compared.
Simulation Environment for Mixed AHB-NoC Architectures / Conti, M.. - ELETTRONICO. - 866:(2022), pp. 273-279. [10.1007/978-3-030-95498-7_38]
Simulation Environment for Mixed AHB-NoC Architectures
Conti M.
Primo
2022-01-01
Abstract
Communication architecture is crucial for performances and power constraints in modern multicore systems on chip (SoC). Network-on-Chip (NoC) is used to increase the bandwidth limitations of a traditional bus paradigm. In this work an interface between the AMBA-AHB bus and NoC has been designed. A NoC simulation environment has been modified integrating the AHB architectures in different NoC architectures. The performances of different heterogeneous (AHB-NoC) architectures have been compared.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
