Communication architecture is crucial for performances and power constraints in modern multicore systems on chip (SoC). Network-on-Chip (NoC) is used to increase the bandwidth limitations of a traditional bus paradigm. In this work an interface between the AMBA-AHB bus and NoC has been designed. A NoC simulation environment has been modified integrating the AHB architectures in different NoC architectures. The performances of different heterogeneous (AHB-NoC) architectures have been compared.

Simulation Environment for Mixed AHB-NoC Architectures

Conti M.
Primo
2022

Abstract

Communication architecture is crucial for performances and power constraints in modern multicore systems on chip (SoC). Network-on-Chip (NoC) is used to increase the bandwidth limitations of a traditional bus paradigm. In this work an interface between the AMBA-AHB bus and NoC has been designed. A NoC simulation environment has been modified integrating the AHB architectures in different NoC architectures. The performances of different heterogeneous (AHB-NoC) architectures have been compared.
978-3-030-95497-0
978-3-030-95498-7
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11566/301714
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