A New Stochastic Learning Algorithm for Analog Hardware Implementation

This paper presents a new stochastic learning algorithm suitable for analog implementation. The Neural Network is partitioned into subnetworks and learning is applied to each subnet in turn. Numerical simulations show an improvement in learning accuracy and a less critical dependence on noise amplitude and annealing parameters. The capability of the algorithm to reduce the sensitivity of the network to weight variation is investigated. The hardware implementation of the algorithm in an analog neural network shows a reduction of 75% in the area occupied by the learning circuitry with respect to a possible implementation without partition in subnetwoks.